Pipelined Architecture of Multi-Band Spectral Subtraction Algorithm for Speech Enhancement
In this paper, a new pipelined architecture of the multi-band spectral subtraction algorithm has been proposed for real-time speech enhancement. The proposed hardware has been implemented on field programmable gate array (FPGA) device using Xilinx system generator (XSG), high-level programming tool,...
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Format: | Article |
Language: | English |
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MDPI AG
2017-09-01
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Series: | Electronics |
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Online Access: | https://www.mdpi.com/2079-9292/6/4/73 |