A New Systolic Array Algorithm and Architecture for the VLSI Implementation of IDST Based on a Pseudo-Band Correlation Structure

A New Systolic Array Algorithm and Architecture for the VLSI Implementation of IDST Based on a Pseudo-Band Correlation Structure

In this paper a new linear VLSI array architecture for the VLSI implementation of a prime-length 1-D Inverse Discrete Sine Transform (IDST) is proposed. This new design approach uses a new efficient VLSI algorithm based on a regular and modular computational structure called pseudo-band correlatio...

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Bibliographic Details
Main Authors: CHIPER, D. F., CRACAN, A., BURDIA, D.
Format: Article
Language:English
Published: Stefan cel Mare University of Suceava 2017-02-01
Series:Advances in Electrical and Computer Engineering
Subjects:
discrete transforms
digital integrated circuits
field programmable gate arrays
large scale integration
systolic arrays
Online Access:http://dx.doi.org/10.4316/AECE.2017.01011

Internet

http://dx.doi.org/10.4316/AECE.2017.01011

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