Performance Optimization of 1-bit Full Adder Cell based on CNTFET Transistor
The full adder is a key component for many digital circuits like microprocessors or digital signal processors. Its main utilization is to perform logical and arithmetic operations. This has empowered the designers to continuously optimize this circuit and ameliorate its characteristics like robustne...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
D. G. Pylarinos
2019-12-01
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| Series: | Engineering, Technology & Applied Science Research |
| Subjects: | |
| Online Access: | https://etasr.com/index.php/ETASR/article/view/3156 |