Array Multipliers for High Throughput in Xilinx FPGAs with 6-Input LUTs
Multiplication is the dominant operation for many applications implemented on field-programmable gate arrays (FPGAs). Although most current FPGA families have embedded hard multipliers, soft multipliers using lookup tables (LUTs) in the logic fabric remain important. This paper presents a novel two-...
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| Format: | Article |
| Language: | English |
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MDPI AG
2016-09-01
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| Series: | Computers |
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| Online Access: | http://www.mdpi.com/2073-431X/5/4/20 |