Extended Lock Range Zero-Crossing Digital Phase-Locked Loop with Time Delay

Extended Lock Range Zero-Crossing Digital Phase-Locked Loop with Time Delay

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<p>The input frequency limit of the conventional zero-crossing digital phase-locked loop (ZCDPLL) is due to the operating time of the digital circuitry inside the feedback loop. A solution that has been previously suggested is the introduction of a time delay in the feedback path of the loop t...

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Bibliographic Details
Main Author: Nasir Qassim
Format: Article
Language:English
Published: SpringerOpen 2005-01-01
Series:EURASIP Journal on Wireless Communications and Networking
Subjects:
nonuniform sampling
digital phase locked loops
chaos control
Online Access:http://dx.doi.org/10.1155/WCN.2005.413

Internet

http://dx.doi.org/10.1155/WCN.2005.413

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