Analyzing Power and Energy Efficiency of Bitonic Mergesort Based on Performance Evaluation
In graphics processing unit (GPU) computing community, bitonic mergesort (BM) is recognized as one of the most investigated sorting algorithms. It is specially designed for parallel architectures, requires minor inter-process communication, can be implemented in-place, and is logically appropriate f...
Main Authors: | , , , |
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Format: | Article |
Language: | English |
Published: |
IEEE
2018-01-01
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Series: | IEEE Access |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/8423634/ |