Analyzing Power and Energy Efficiency of Bitonic Mergesort Based on Performance Evaluation

In graphics processing unit (GPU) computing community, bitonic mergesort (BM) is recognized as one of the most investigated sorting algorithms. It is specially designed for parallel architectures, requires minor inter-process communication, can be implemented in-place, and is logically appropriate f...

Full description

Bibliographic Details
Main Authors: Osama Ahmed Abulnaja, Muhammad Jawad Ikram, Muhammad Abdulhamid Al-Hashimi, Mostafa Elsayed Saleh
Format: Article
Language:English
Published: IEEE 2018-01-01
Series:IEEE Access
Subjects:
GPU
Online Access:https://ieeexplore.ieee.org/document/8423634/