Low-Power Embedded DSP Core for Communication Systems

Low-Power Embedded DSP Core for Communication Systems

<p/> <p>This paper proposes a parameterized digital signal processor (DSP) core for an embedded digital signal processing system designed to achieve demodulation/synchronization with better performance and flexibility. The features of this DSP core include parameterized data path, dual M...

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Bibliographic Details
Main Authors: Tsao Ya-Lan, Chen Wei-Hao, Tan Ming Hsuan, Lin Maw-Ching, Jou Shyh-Jye
Format: Article
Language:English
Published: SpringerOpen 2003-01-01
Series:EURASIP Journal on Advances in Signal Processing
Subjects:
digital signal processor
embedded system
dual MAC
subword multiplier
Online Access:http://dx.doi.org/10.1155/S1110865703309059

Internet

http://dx.doi.org/10.1155/S1110865703309059

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