High-Throughput FPGA-Based Hardware Accelerators for Deflate Compression and Decompression Using High-Level Synthesis

High-Throughput FPGA-Based Hardware Accelerators for Deflate Compression and Decompression Using High-Level Synthesis

The Deflate compression algorithm provides one of the most widely used solutions for lossless data compression. Field-programmable gate arrays (FPGAs) are commonly used to implement hardware accelerators that speed up computation-intensive applications. In this article, FPGA-based accelerators for D...

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Bibliographic Details
Main Authors: Morgan Ledwon, Bruce F. Cockburn, Jie Han
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Access
Subjects:
Deflate algorithm
lossless compression
LZ77 compression
hardware accelerator
FPGAbased accelerator
high-level synthesis
Online Access:https://ieeexplore.ieee.org/document/9050498/

Internet

https://ieeexplore.ieee.org/document/9050498/

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