High Performance Drain Engineered InGaN Heterostructure Tunnel Field Effect Transistor

High Performance Drain Engineered InGaN Heterostructure Tunnel Field Effect Transistor

A drain engineered InGaN heterostructure tunnel field effect transistor (TFET) is proposed and investigated by Silvaco Atlas simulation. This structure uses an additional metal on the drain region to modulate the energy band near the drain/channel interface in the drain regions, and increase the tun...

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Bibliographic Details
Main Authors: Xiaoling Duan, Jincheng Zhang, Jiabo Chen, Tao Zhang, Jiaduo Zhu, Zhiyu Lin, Yue Hao
Format: Article
Language:English
Published: MDPI AG 2019-01-01
Series:Micromachines
Subjects:
drain engineered
tunnel field effect transistor (TFET)
polarization
ambipolar
subthreshold
ON-state
Online Access:https://www.mdpi.com/2072-666X/10/1/75

Internet

https://www.mdpi.com/2072-666X/10/1/75

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