Low-power adiabatic 9T static random access memory

Low-power adiabatic 9T static random access memory

In this paper, the authors propose a novel static random access memory (SRAM) that employs the adiabatic logic principle. To reduce energy dissipation, the proposed adiabatic SRAM is driven by two trapezoidal-wave pulses. The cell structure of the proposed SRAM has two high-value resistors based on...

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Bibliographic Details
Main Authors: Yasuhiro Takahashi, Nazrul Anuar Nayan, Toshikazu Sekine, Michio Yokoyama
Format: Article
Language:English
Published: Wiley 2014-06-01
Series:The Journal of Engineering
Subjects:
SRAM chips
MOSFET
short-circuit currents
low-power electronics
low-power adiabatic 9T SRAM
data writing
write word line signal
short-circuit current
NMOS switch
cross-coupled n-type metal-oxide semiconductor
p-type metal-oxide semiconductor transistor
cell structure
trapezoidal-wave pulses
energy dissipation
adiabatic logic principle
low-power adiabatic static random access memory
Online Access:http://digital-library.theiet.org/content/journals/10.1049/joe.2014.0009

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http://digital-library.theiet.org/content/journals/10.1049/joe.2014.0009

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