FPGA implementation of impedance-compensated phase-locked loop for HVDC converters
The phase-locked loop (PLL) plays a key role in HVDC systems. Recently, a new type of PLL called the impedance-compensated phase-locked loop (IC-PLL) was introduced to compensate for the voltage drop across the AC network's Thevenin impedance, making the phase locking more robust against transi...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2018-10-01
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| Series: | The Journal of Engineering |
| Subjects: | |
| Online Access: | https://digital-library.theiet.org/content/journals/10.1049/joe.2018.8789 |