Improved Device Distribution in High-Performance SiN<sub>x</sub> Resistive Random Access Memory via Arsenic Ion Implantation

Large device variation is a fundamental challenge for resistive random access memory (RRAM) array circuit. Improved device-to-device distributions of set and reset voltages in a SiN<sub>x</sub> RRAM device is realized via arsenic ion (As<sup>+</sup>) implantation. Besides, th...

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Main Authors: Te-Jui Yen, Albert Chin, Vladimir Gritsenko
Format: Article
Language:English
Published: MDPI AG 2021-05-01
Series:Nanomaterials
Subjects:
Online Access:https://www.mdpi.com/2079-4991/11/6/1401
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spelling doaj-7c4efbe77af540c38f9534c7ac8fed4f2021-06-01T01:06:18ZengMDPI AGNanomaterials2079-49912021-05-01111401140110.3390/nano11061401Improved Device Distribution in High-Performance SiN<sub>x</sub> Resistive Random Access Memory via Arsenic Ion ImplantationTe-Jui Yen0Albert Chin1Vladimir Gritsenko2Department of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu 300, TaiwanDepartment of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu 300, TaiwanRzhanov Institute of Semiconductor Physics, Siberian Branch, Russian Academy of Sciences, 630090 Novosibirsk, RussiaLarge device variation is a fundamental challenge for resistive random access memory (RRAM) array circuit. Improved device-to-device distributions of set and reset voltages in a SiN<sub>x</sub> RRAM device is realized via arsenic ion (As<sup>+</sup>) implantation. Besides, the As<sup>+</sup>-implanted SiN<sub>x</sub> RRAM device exhibits much tighter cycle-to-cycle distribution than the nonimplanted device. The As<sup>+</sup>-implanted SiN<sub>x</sub> device further exhibits excellent performance, which shows high stability and a large 1.73 × 10<sup>3</sup> resistance window at 85 °C retention for 10<sup>4</sup> s, and a large 10<sup>3</sup> resistance window after 10<sup>5</sup> cycles of the pulsed endurance test. The current–voltage characteristics of high- and low-resistance states were both analyzed as space-charge-limited conduction mechanism. From the simulated defect distribution in the SiN<sub>x</sub> layer, a microscopic model was established, and the formation and rupture of defect-conductive paths were proposed for the resistance switching behavior. Therefore, the reason for such high device performance can be attributed to the sufficient defects created by As<sup>+</sup> implantation that leads to low forming and operation power.https://www.mdpi.com/2079-4991/11/6/1401SiN<sub>x</sub> RRAMion implantationneuron mimicking device
collection DOAJ
language English
format Article
sources DOAJ
author Te-Jui Yen
Albert Chin
Vladimir Gritsenko
spellingShingle Te-Jui Yen
Albert Chin
Vladimir Gritsenko
Improved Device Distribution in High-Performance SiN<sub>x</sub> Resistive Random Access Memory via Arsenic Ion Implantation
Nanomaterials
SiN<sub>x</sub> RRAM
ion implantation
neuron mimicking device
author_facet Te-Jui Yen
Albert Chin
Vladimir Gritsenko
author_sort Te-Jui Yen
title Improved Device Distribution in High-Performance SiN<sub>x</sub> Resistive Random Access Memory via Arsenic Ion Implantation
title_short Improved Device Distribution in High-Performance SiN<sub>x</sub> Resistive Random Access Memory via Arsenic Ion Implantation
title_full Improved Device Distribution in High-Performance SiN<sub>x</sub> Resistive Random Access Memory via Arsenic Ion Implantation
title_fullStr Improved Device Distribution in High-Performance SiN<sub>x</sub> Resistive Random Access Memory via Arsenic Ion Implantation
title_full_unstemmed Improved Device Distribution in High-Performance SiN<sub>x</sub> Resistive Random Access Memory via Arsenic Ion Implantation
title_sort improved device distribution in high-performance sin<sub>x</sub> resistive random access memory via arsenic ion implantation
publisher MDPI AG
series Nanomaterials
issn 2079-4991
publishDate 2021-05-01
description Large device variation is a fundamental challenge for resistive random access memory (RRAM) array circuit. Improved device-to-device distributions of set and reset voltages in a SiN<sub>x</sub> RRAM device is realized via arsenic ion (As<sup>+</sup>) implantation. Besides, the As<sup>+</sup>-implanted SiN<sub>x</sub> RRAM device exhibits much tighter cycle-to-cycle distribution than the nonimplanted device. The As<sup>+</sup>-implanted SiN<sub>x</sub> device further exhibits excellent performance, which shows high stability and a large 1.73 × 10<sup>3</sup> resistance window at 85 °C retention for 10<sup>4</sup> s, and a large 10<sup>3</sup> resistance window after 10<sup>5</sup> cycles of the pulsed endurance test. The current–voltage characteristics of high- and low-resistance states were both analyzed as space-charge-limited conduction mechanism. From the simulated defect distribution in the SiN<sub>x</sub> layer, a microscopic model was established, and the formation and rupture of defect-conductive paths were proposed for the resistance switching behavior. Therefore, the reason for such high device performance can be attributed to the sufficient defects created by As<sup>+</sup> implantation that leads to low forming and operation power.
topic SiN<sub>x</sub> RRAM
ion implantation
neuron mimicking device
url https://www.mdpi.com/2079-4991/11/6/1401
work_keys_str_mv AT tejuiyen improveddevicedistributioninhighperformancesinsubxsubresistiverandomaccessmemoryviaarsenicionimplantation
AT albertchin improveddevicedistributioninhighperformancesinsubxsubresistiverandomaccessmemoryviaarsenicionimplantation
AT vladimirgritsenko improveddevicedistributioninhighperformancesinsubxsubresistiverandomaccessmemoryviaarsenicionimplantation
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