Low-Complexity High-Performance Low-Density Parity-Check Encoder Design for China Digital Radio Standard

Low-Complexity High-Performance Low-Density Parity-Check Encoder Design for China Digital Radio Standard

This paper proposes a novel encoder architecture of low-density parity-check (LDPC) generator matrix in frequency modulation-China digital radio (CDR), which was promulgated in August 2013. We utilize the specific structure of LDPC parity matrix to parallelize row and column encoding operations. An...

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Bibliographic Details
Main Authors: Dongying Chen, Pingping Chen, Yi Fang
Format: Article
Language:English
Published: IEEE 2017-01-01
Series:IEEE Access
Subjects:
Frequency modulation
China digital radio (CDR)
LDPC
encoder
FPGA
Online Access:https://ieeexplore.ieee.org/document/7967822/

Internet

https://ieeexplore.ieee.org/document/7967822/

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