A Hybrid-CPU-FPGA-based Solution to the Recovery of Sha256crypt-hashed Passwords
This paper presents an accelerator design for the password recovery of sha256crypt based on hybrid CPU-FPGA devices. By applying the brute-force attack computation model proposed in this paper, we decompose the sha256crypt function into two types of operations, namely the data dispatching and the b...
Main Authors: | , |
---|---|
Format: | Article |
Language: | English |
Published: |
Ruhr-Universität Bochum
2020-08-01
|
Series: | Transactions on Cryptographic Hardware and Embedded Systems |
Subjects: | |
Online Access: | https://tches.iacr.org/index.php/TCHES/article/view/8675 |