Formation of thermally grown SiO2/GaN interface

An attempt was made to form a thermally grown SiO2/GaN interface. A Si layer deposited on the c-plane GaN surface was oxidized in an O2 atmosphere to form a SiO2 layer. The formation of SiO2 with a bandgap of 8.6 eV was confirmed by x-ray photoelectron spectroscopy. Metal–oxide–semiconductor diodes...

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Main Authors: Masamichi Akazawa, Yuya Kitawaki
Format: Article
Language:English
Published: AIP Publishing LLC 2021-08-01
Series:AIP Advances
Online Access:http://dx.doi.org/10.1063/5.0060821
id doaj-7655960a99374658ac5eede9ea51cb23
record_format Article
spelling doaj-7655960a99374658ac5eede9ea51cb232021-09-03T11:18:11ZengAIP Publishing LLCAIP Advances2158-32262021-08-01118085020085020-510.1063/5.0060821Formation of thermally grown SiO2/GaN interfaceMasamichi Akazawa0Yuya Kitawaki1Research Center for Integrated Quantum Electronics, Hokkaido University, Sapporo 060-0813, JapanResearch Center for Integrated Quantum Electronics, Hokkaido University, Sapporo 060-0813, JapanAn attempt was made to form a thermally grown SiO2/GaN interface. A Si layer deposited on the c-plane GaN surface was oxidized in an O2 atmosphere to form a SiO2 layer. The formation of SiO2 with a bandgap of 8.6 eV was confirmed by x-ray photoelectron spectroscopy. Metal–oxide–semiconductor diodes were fabricated and tested to characterize the interface by electrical measurements. The capacitance–voltage (C–V) characteristics measured at 1 MHz showed that a longer oxidation time resulted in a steeper slope. However, it was unavoidable that a bump in a C–V curve appeared after a long oxidation time. The electron trap distributions derived from C–V curves exhibited a discrete-level trap at 0.7 eV from the conduction band edge. This discrete-level trap was an acceptor-like trap that can be assigned to a Ga vacancy. An insufficient oxidation led to a high leakage current owing to the asperities of the residual polycrystalline Si layer. Although the leakage current was improved by extending the oxidation time, an excessively long oxidation time resulted in a slight increase in the leakage current. We cannot deny the possibility of the diffusion of Ga atoms into SiO2 during oxidation. Moreover, the cross-sectional transmission electron microscopy and energy-dispersive x-ray spectroscopy of a sample formed with an excessively long oxidation time indicated the formation of a Ga oxide interlayer without a severe disorder. Most possibly, the formation of the Ga oxide interlayer by excess oxidation improved the interface properties.http://dx.doi.org/10.1063/5.0060821
collection DOAJ
language English
format Article
sources DOAJ
author Masamichi Akazawa
Yuya Kitawaki
spellingShingle Masamichi Akazawa
Yuya Kitawaki
Formation of thermally grown SiO2/GaN interface
AIP Advances
author_facet Masamichi Akazawa
Yuya Kitawaki
author_sort Masamichi Akazawa
title Formation of thermally grown SiO2/GaN interface
title_short Formation of thermally grown SiO2/GaN interface
title_full Formation of thermally grown SiO2/GaN interface
title_fullStr Formation of thermally grown SiO2/GaN interface
title_full_unstemmed Formation of thermally grown SiO2/GaN interface
title_sort formation of thermally grown sio2/gan interface
publisher AIP Publishing LLC
series AIP Advances
issn 2158-3226
publishDate 2021-08-01
description An attempt was made to form a thermally grown SiO2/GaN interface. A Si layer deposited on the c-plane GaN surface was oxidized in an O2 atmosphere to form a SiO2 layer. The formation of SiO2 with a bandgap of 8.6 eV was confirmed by x-ray photoelectron spectroscopy. Metal–oxide–semiconductor diodes were fabricated and tested to characterize the interface by electrical measurements. The capacitance–voltage (C–V) characteristics measured at 1 MHz showed that a longer oxidation time resulted in a steeper slope. However, it was unavoidable that a bump in a C–V curve appeared after a long oxidation time. The electron trap distributions derived from C–V curves exhibited a discrete-level trap at 0.7 eV from the conduction band edge. This discrete-level trap was an acceptor-like trap that can be assigned to a Ga vacancy. An insufficient oxidation led to a high leakage current owing to the asperities of the residual polycrystalline Si layer. Although the leakage current was improved by extending the oxidation time, an excessively long oxidation time resulted in a slight increase in the leakage current. We cannot deny the possibility of the diffusion of Ga atoms into SiO2 during oxidation. Moreover, the cross-sectional transmission electron microscopy and energy-dispersive x-ray spectroscopy of a sample formed with an excessively long oxidation time indicated the formation of a Ga oxide interlayer without a severe disorder. Most possibly, the formation of the Ga oxide interlayer by excess oxidation improved the interface properties.
url http://dx.doi.org/10.1063/5.0060821
work_keys_str_mv AT masamichiakazawa formationofthermallygrownsio2ganinterface
AT yuyakitawaki formationofthermallygrownsio2ganinterface
_version_ 1717817448182317056