CASE STUDY OF EXPLICIT AND IMPLICIT PULSED FLIP FLOPS WITH CONDITIONAL PULSE ENHANCEMENT MECHANISM
In this paper a study of power efficient pulse triggered flip flops was conducted by adopting a pulse control scheme (PCS), named conditional pulse enhancement. The conditional pulse enhancement scheme consists of a simple pass transistor ‘AND’ gate design and a pull up ‘pMOS’. This set up reduc...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
ICT Academy of Tamil Nadu
2015-10-01
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| Series: | ICTACT Journal on Microelectronics |
| Subjects: | |
| Online Access: | http://ictactjournals.in/paper/IJME_paper_5_120_123.pdf |