Design Flow and Characterization Methodology for Dual Mode Logic
Recently, the dual mode logic (DML) family was introduced as a superior energy-delay alternative to CMOS. DML gates utilize two different modes of operation, dynamic and static, to selectively achieve either high-performance or low-energy operation. Custom designs of DML circuits have been shown to...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2015-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/7370913/ |