A Low-Cost VLSI Architecture of the Bilateral Filter for Real-Time Image Denoising

A Low-Cost VLSI Architecture of the Bilateral Filter for Real-Time Image Denoising

In this paper, a low-cost hardware architecture of the bilateral filter for real-time image processing is proposed. Based on the techniques of distance-oriented grouping and hardware resource sharing, the usage of multipliers can decrease 48% as compared to the previous approach. Besides, an efficie...

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Bibliographic Details
Main Authors: Chih-Yuan Lien, Chi-Huan Tang, Pei-Yin Chen, Yao-Tsung Kuo, Yue-Ling Deng
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Access
Subjects:
Bilateral filter
image processing
noise reduction
real-time processing
Online Access:https://ieeexplore.ieee.org/document/9051724/

Internet

https://ieeexplore.ieee.org/document/9051724/

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