SYNTHESIS METHOD OF DIGITAL-TO-ANALOG CONVERTER SCHEMATIC MODELS FOR INTEGRATED CIRCUITS

SYNTHESIS METHOD OF DIGITAL-TO-ANALOG CONVERTER SCHEMATIC MODELS FOR INTEGRATED CIRCUITS

Subject of Research.Parasitic parameters, which appear on layout design stage of analog schematic model, cause negative effect on analog block performance. The presence of negative effect of parasitic parameters can be the reason for block inadequacy to its technical requirements. It leads to new de...

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Bibliographic Details
Main Authors: A. A. Mikhteeva, I. V. Lemko
Format: Article
Language:English
Published: Saint Petersburg National Research University of Information Technologies, Mechanics and Optics (ITMO University) 2018-03-01
Series:Naučno-tehničeskij Vestnik Informacionnyh Tehnologij, Mehaniki i Optiki
Subjects:
integrated circuit
digital-to-analog converter
synthesis
schematic model
parasitic parameters
Online Access:http://ntv.ifmo.ru/file/article/17640.pdf

Internet

http://ntv.ifmo.ru/file/article/17640.pdf

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