CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability

CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability

NAND flash suffers from program interference and retention errors, which negatively affect its reliability. Existing schemes preprocess raw data before writing them to reduce Raw Bit Error Rate (RBER) and leverage ECCs (such as LDPC codes) to reduce Uncorrectable Bit Error Rate (UBER). Prior arts fa...

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Bibliographic Details
Main Authors: Hongwei Qin, Yutong Zhao, Dan Feng, Jingning Liu, Wei Tong
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Access
Subjects:
Cell state remapping
flash reliability
LDPC codes
NAND flash memory
program interference
retention error
Online Access:https://ieeexplore.ieee.org/document/9055021/

Internet

https://ieeexplore.ieee.org/document/9055021/

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