Impact of Cycling Induced Intercell Trapped Charge on Retention Charge Loss in 3-D NAND Flash Memory

As the 3D NAND technology developing toward more and more stack layers, it is essential to shrink the gate length (Lg) and inter-gate space (Ls). However, one of key concerns of scaling Lg/Ls 3D NAND flash is post-cycling data retention characteristics. The impact of cycling induced intercell trappe...

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Bibliographic Details
Main Authors: Xinlei Jia, Lei Jin, Wei Hou, Zhiyu Wang, Songmin Jiang, Kaiwei Li, Dejia Huang, Hongtao Liu, Wenzhe Wei, Jianwei Lu, An Zhang, Zongliang Huo
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Online Access:https://ieeexplore.ieee.org/document/8948038/