Theoretical Optimization of the Si GSS-DMM Device in the BaSIC Topology for SiC Power MOSFET Short-Circuit Capability Improvement
The BaSIC(DMM) topology has been experimentally demonstrated to improve the short-circuit time for a 1.2 kV SiC power MOSFET product from <inline-formula> <tex-math notation="LaTeX">$4.8~\mu \text{s}$ </tex-math></inline-formula> to <inline-formula> <tex-ma...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2021-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/9424559/ |