White Light Interference Solution for Novel 3D NAND VIA Dishing Metrology

• Main Authors: Xiaoye Ding, Sicong Wang, Yi Zhou, Yanzhong Ma, Le Yang, Chi Chen
• Format: Article
• Language: English
• Published: JommPublish 2019-12-01
• Series: Journal of Microelectronic Manufacturing
• Subjects: wli; dishing; metrology; 3d nand; bonding
• Online Access: http://www.jommpublish.org/p/42/#

In traditional 3D NAND design, peripheral circuit accounts for 20-30% of the chip real-estate, which reduces the memory density of flash memory. As 3D NAND technology stacks to 128 layers or higher, peripheral circuits may account for more than 50% of the overall chip area. On the contrast, the XtackingTM technology arranges array and logic parts on two different wafers, and connects the memory arrays to the logic circuit by metal VIAs (Vertical Interconnect Accesses) to achieve unprecedented high storage density as well as DRAM level I/O speed. As a consequence, it becomes increasingly significant to monitor metal VIAs depth before wafer bonding process as to ensure reliability of array-logic connections. Currently, AFM (Atom Force Microscopy) is the main stream method of VIA depth monitoring. Apparently, AFM wins the battle of precision, however the low throughput limited its usage in mass production. In order to accomplish the requirement of VLSI production, a WLI (White Light Interference) metrology is revisited and a novel WLI method was developed to monitor VIAs depth. Basically there are two major limitations that keep WLI tools from wider use, transparent film impact and diffraction limitation. In this work, the engineering solutions are illustrated and inline dishing measurement is achieved with high accuracy and precision.