A 62-90 GHz High Linearity and Low Noise CMOS Mixer Using Transformer-Coupling Cascode Topology
This paper presents a high linearity and low noise mixer for millimeter-wave applications in 65-nm CMOS process. A noise-reduction transformer with harmonic suppression is utilized and inserted between transconductance stage and switch stage to improve the linearity and noise figure (NF). Benefitted...
Main Authors: | , , , , , , , |
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Format: | Article |
Language: | English |
Published: |
IEEE
2018-01-01
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Series: | IEEE Access |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/8314664/ |