Switching Time Delay Optimization for “SiC+Si” Hybrid Device in a Phase-Leg Configuration

Compared to SiC MOSFET, the switching loss of Si IGBT is much higher due to its slow switching speed and tail current. Si IGBT/SiC MOSFET hybrid switch device can reach to optimal performance with low static and dynamic loss, which can improve the current capacity of SiC devices and reduce the power...

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Main Authors: Haihong Qin, Ruoxuan Wang, Qian Xun, Wenming Chen, Sixuan Xie
Format: Article
Language:English
Published: IEEE 2021-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9339907/
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spelling doaj-2f37335c79224aef98bf3f2773cf189e2021-03-30T14:55:53ZengIEEEIEEE Access2169-35362021-01-019375423755610.1109/ACCESS.2021.30552449339907Switching Time Delay Optimization for “SiC+Si” Hybrid Device in a Phase-Leg ConfigurationHaihong Qin0Ruoxuan Wang1https://orcid.org/0000-0002-4249-5289Qian Xun2https://orcid.org/0000-0001-5344-5298Wenming Chen3Sixuan Xie4Department of Electrical Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, ChinaDepartment of Electrical Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, ChinaDepartment of Electrical Engineering, Chalmers University of Technology, Gothenburg, SwedenDepartment of Electrical Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, ChinaDepartment of Electrical Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, ChinaCompared to SiC MOSFET, the switching loss of Si IGBT is much higher due to its slow switching speed and tail current. Si IGBT/SiC MOSFET hybrid switch device can reach to optimal performance with low static and dynamic loss, which can improve the current capacity of SiC devices and reduce the power loss of Si IGBT based converters. With the separated gate control signals, the switching moments of the two devices can be controlled independently to ensure Si IGBT under zero-voltage switching (ZVS) conditions. This measurement tends to reduce the switching loss of Si IGBT. However, the switching time delay between these two devices has significant impacts on its power loss. In this paper, the switching time delay optimization method is proposed to minimize the power loss of the hybrid switch. The static and dynamic characteristics of Si IGBT/SiC MOSFET hybrid-paralleled switch are studied, and a generalized power loss model for hybrid switch is developed. The influence of switching time delay on the characteristics of hybrid switch is analyzed and verified through double pulse tests in a phase-leg configuration. The experimental results show that the optimal turn-on delay time is that the two devices turn on at the same time and the turn-on loss can be reduced by about 73% compared with the solely Si IGBT and by about 52% compared with the solely SiC MOSFET. While the optimal turn-off sequence is that the Si IGBT turns off ahead of the SiC MOSFET. Under the proposed optimal turn-off delay time of the hybrid switch, the turn-off loss is reduced by about 61.4%. This optimization strategy is used in a Buck converter to verify the superiority of the SiC/Si hybrid switch and the optimal switching sequence. Simulation results show that the optimal switching sequence is consistent with theoretical analysis, and the efficiency is improved by 2.5% compared with Buck converter using solely Si IGBT.https://ieeexplore.ieee.org/document/9339907/Si IGBT/SiC MOSFEThybrid switchpower loss modelswitching time delaydouble pulse tests
collection DOAJ
language English
format Article
sources DOAJ
author Haihong Qin
Ruoxuan Wang
Qian Xun
Wenming Chen
Sixuan Xie
spellingShingle Haihong Qin
Ruoxuan Wang
Qian Xun
Wenming Chen
Sixuan Xie
Switching Time Delay Optimization for “SiC+Si” Hybrid Device in a Phase-Leg Configuration
IEEE Access
Si IGBT/SiC MOSFET
hybrid switch
power loss model
switching time delay
double pulse tests
author_facet Haihong Qin
Ruoxuan Wang
Qian Xun
Wenming Chen
Sixuan Xie
author_sort Haihong Qin
title Switching Time Delay Optimization for “SiC+Si” Hybrid Device in a Phase-Leg Configuration
title_short Switching Time Delay Optimization for “SiC+Si” Hybrid Device in a Phase-Leg Configuration
title_full Switching Time Delay Optimization for “SiC+Si” Hybrid Device in a Phase-Leg Configuration
title_fullStr Switching Time Delay Optimization for “SiC+Si” Hybrid Device in a Phase-Leg Configuration
title_full_unstemmed Switching Time Delay Optimization for “SiC+Si” Hybrid Device in a Phase-Leg Configuration
title_sort switching time delay optimization for “sic+si” hybrid device in a phase-leg configuration
publisher IEEE
series IEEE Access
issn 2169-3536
publishDate 2021-01-01
description Compared to SiC MOSFET, the switching loss of Si IGBT is much higher due to its slow switching speed and tail current. Si IGBT/SiC MOSFET hybrid switch device can reach to optimal performance with low static and dynamic loss, which can improve the current capacity of SiC devices and reduce the power loss of Si IGBT based converters. With the separated gate control signals, the switching moments of the two devices can be controlled independently to ensure Si IGBT under zero-voltage switching (ZVS) conditions. This measurement tends to reduce the switching loss of Si IGBT. However, the switching time delay between these two devices has significant impacts on its power loss. In this paper, the switching time delay optimization method is proposed to minimize the power loss of the hybrid switch. The static and dynamic characteristics of Si IGBT/SiC MOSFET hybrid-paralleled switch are studied, and a generalized power loss model for hybrid switch is developed. The influence of switching time delay on the characteristics of hybrid switch is analyzed and verified through double pulse tests in a phase-leg configuration. The experimental results show that the optimal turn-on delay time is that the two devices turn on at the same time and the turn-on loss can be reduced by about 73% compared with the solely Si IGBT and by about 52% compared with the solely SiC MOSFET. While the optimal turn-off sequence is that the Si IGBT turns off ahead of the SiC MOSFET. Under the proposed optimal turn-off delay time of the hybrid switch, the turn-off loss is reduced by about 61.4%. This optimization strategy is used in a Buck converter to verify the superiority of the SiC/Si hybrid switch and the optimal switching sequence. Simulation results show that the optimal switching sequence is consistent with theoretical analysis, and the efficiency is improved by 2.5% compared with Buck converter using solely Si IGBT.
topic Si IGBT/SiC MOSFET
hybrid switch
power loss model
switching time delay
double pulse tests
url https://ieeexplore.ieee.org/document/9339907/
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AT ruoxuanwang switchingtimedelayoptimizationforx201csicx002bsix201dhybriddeviceinaphaselegconfiguration
AT qianxun switchingtimedelayoptimizationforx201csicx002bsix201dhybriddeviceinaphaselegconfiguration
AT wenmingchen switchingtimedelayoptimizationforx201csicx002bsix201dhybriddeviceinaphaselegconfiguration
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