Statistical and Electrical Modeling of FDSOI Four-Gate Qubit MOS Devices at Room Temperature
This paper presents an electrical characterization and a compact modeling of FD-SOI four-gate qubit MOS devices, carried out at room temperature and in linear regime. The main figures of merit are extracted from average drain current curves using Y – function method. Poisson solver-based...
Main Authors: | Edoardo Catapano, Gerard Ghibaudo, Mikael Casse, Tadeu Mota Frutuoso, Bruna Cardoso Paz, Thomas Bedecarrats, Agostino Apra, Fred Gaillard, Silvano De Franceschi, Tristan Meunier, Maud Vinet |
---|---|
Format: | Article |
Language: | English |
Published: |
IEEE
2021-01-01
|
Series: | IEEE Journal of the Electron Devices Society |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/9437341/ |
Similar Items
-
Comparative Study of FinFET and FDSOI Nanometric Technologies Based on Manufacturing Defect Testability
by: Karel, Amit
Published: (2017) -
Conception, fabrication et caractérisation de nouveaux dispositifs de FDSOI avancés pour protection contre les décharges électrostatiques
by: Athanasiou, Sotirios
Published: (2017) -
Implémentation de PCM (Process Compact Models) pour l’étude et l’amélioration de la variabilité des technologies CMOS FDSOI avancées
by: Denis, Yvan
Published: (2016) -
Optimisation de dispositifs FDSOI pour la gestion de la consommation et de la vitesse : application aux mémoires et fonctions logiques
by: Noël, Jean-Philippe
Published: (2011) -
Simulation of FDSOI-ISFET with Tunable Sensitivity by Temperature and Dual-Gate Structure
by: Hanbin Wang, et al.
Published: (2021-06-01)