Statistical and Electrical Modeling of FDSOI Four-Gate Qubit MOS Devices at Room Temperature

Statistical and Electrical Modeling of FDSOI Four-Gate Qubit MOS Devices at Room Temperature

This paper presents an electrical characterization and a compact modeling of FD-SOI four-gate qubit MOS devices, carried out at room temperature and in linear regime. The main figures of merit are extracted from average drain current curves using Y – function method. Poisson solver-based...

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Bibliographic Details
Main Authors: Edoardo Catapano, Gerard Ghibaudo, Mikael Casse, Tadeu Mota Frutuoso, Bruna Cardoso Paz, Thomas Bedecarrats, Agostino Apra, Fred Gaillard, Silvano De Franceschi, Tristan Meunier, Maud Vinet
Format: Article
Language:English
Published: IEEE 2021-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
FDSOI CMOS qubits
electrical characterization
Lambert function modeling
mismatch
multi-gate FD-SOI nanowire
Y-function
Online Access:https://ieeexplore.ieee.org/document/9437341/

Internet

https://ieeexplore.ieee.org/document/9437341/

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