A 2.4/5.2-GHz Concurrent Dual-Band CMOS Low Noise Amplifier

A 2.4/5.2-GHz Concurrent Dual-Band CMOS Low Noise Amplifier

A concurrent dual-band low-noise amplifier (LNA) targeted for W-LAN IEEE 802.11 a/b/g standards is designed using 0.13-μm CMOS process. To attain the power-constrained simultaneous noise and input matching at 2.4 and 5.2 GHz, cascode common source inductive degeneration topology is adopte...

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Bibliographic Details
Main Authors: Sami Sattar, Tun Zainal Azni Zulkifli
Format: Article
Language:English
Published: IEEE 2017-01-01
Series:IEEE Access
Subjects:
CMOS
concurrent dual-band
low noise amplifier (LNA)
low power consumption
high gain
Online Access:https://ieeexplore.ieee.org/document/8051051/

Internet

https://ieeexplore.ieee.org/document/8051051/

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