A 12-Gb/s Stacked Dual-Channel Interface for CMOS Image Sensor Systems

A 12-Gb/s Stacked Dual-Channel Interface for CMOS Image Sensor Systems

We propose a dual-channel interface architecture that allocates high and low transition-density bit streams to two separate channels. The transmitter utilizes the stacked drivers with charge-recycling to reduce the power consumption. The direct current (DC)-coupled receiver front-end circuits manage...

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Bibliographic Details
Main Authors: Sang-Hoon Kim, Hoon Shin, Youngkyun Jeong, June-Hee Lee, Jaehyuk Choi, Jung-Hoon Chun
Format: Article
Language:English
Published: MDPI AG 2018-08-01
Series:Sensors
Subjects:
dual-channel
transceiver
charge-recycling
shared CDR
CMOS Image Sensor (CIS) System
stacked driver
Online Access:http://www.mdpi.com/1424-8220/18/8/2709

Internet

http://www.mdpi.com/1424-8220/18/8/2709

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