Power Integrity Coanalysis Methodology for Multi-Domain High-Speed Memory Systems
With the increasing demand for state-of-the-art technologies, such as wearable devices and the Internet of things (IoT), power integrity has emerged as a major concern for high-speed, low-power interfaces that are used as mobile platforms. By using case-specific design models in a high-speed memory...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2019-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/8763973/ |