NI Based System for Seu Testing of Memory Chips for Avionics

NI Based System for Seu Testing of Memory Chips for Avionics

This paper presents the results of implementation of National Instrument based system for Single Event Upset testing of memory chips into neutron generator experimental facility, which used for SEU tests for avionics purposes. Basic SEU testing algorithm with error correction and constant errors det...

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Main Authors: Boruzdina Anna, Yanenko Andrey, Tikhomirov Georgy, Tumanov Vitaly
Format: Article
Language:English
Published: EDP Sciences 2016-01-01
Series:MATEC Web of Conferences
Online Access:http://dx.doi.org/10.1051/matecconf/20167901028
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spelling doaj-034460aac8e14f4e9b78e686c92b01172021-02-02T00:44:58ZengEDP SciencesMATEC Web of Conferences2261-236X2016-01-01790102810.1051/matecconf/20167901028matecconf_imet2016_01028NI Based System for Seu Testing of Memory Chips for AvionicsBoruzdina AnnaYanenko AndreyTikhomirov GeorgyTumanov VitalyThis paper presents the results of implementation of National Instrument based system for Single Event Upset testing of memory chips into neutron generator experimental facility, which used for SEU tests for avionics purposes. Basic SEU testing algorithm with error correction and constant errors detection is presented. The issues of radiation shielding of NI based system are discussed and solved. The examples of experimental results show the applicability of the presented system for SEU memory testing under neutrons influence.http://dx.doi.org/10.1051/matecconf/20167901028
collection DOAJ
language English
format Article
sources DOAJ
author Boruzdina Anna
Yanenko Andrey
Tikhomirov Georgy
Tumanov Vitaly
spellingShingle Boruzdina Anna
Yanenko Andrey
Tikhomirov Georgy
Tumanov Vitaly
NI Based System for Seu Testing of Memory Chips for Avionics
MATEC Web of Conferences
author_facet Boruzdina Anna
Yanenko Andrey
Tikhomirov Georgy
Tumanov Vitaly
author_sort Boruzdina Anna
title NI Based System for Seu Testing of Memory Chips for Avionics
title_short NI Based System for Seu Testing of Memory Chips for Avionics
title_full NI Based System for Seu Testing of Memory Chips for Avionics
title_fullStr NI Based System for Seu Testing of Memory Chips for Avionics
title_full_unstemmed NI Based System for Seu Testing of Memory Chips for Avionics
title_sort ni based system for seu testing of memory chips for avionics
publisher EDP Sciences
series MATEC Web of Conferences
issn 2261-236X
publishDate 2016-01-01
description This paper presents the results of implementation of National Instrument based system for Single Event Upset testing of memory chips into neutron generator experimental facility, which used for SEU tests for avionics purposes. Basic SEU testing algorithm with error correction and constant errors detection is presented. The issues of radiation shielding of NI based system are discussed and solved. The examples of experimental results show the applicability of the presented system for SEU memory testing under neutrons influence.
url http://dx.doi.org/10.1051/matecconf/20167901028
work_keys_str_mv AT boruzdinaanna nibasedsystemforseutestingofmemorychipsforavionics
AT yanenkoandrey nibasedsystemforseutestingofmemorychipsforavionics
AT tikhomirovgeorgy nibasedsystemforseutestingofmemorychipsforavionics
AT tumanovvitaly nibasedsystemforseutestingofmemorychipsforavionics
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