Energy/Delay Tradeoffs in All-Spin Logic Circuits

by Zhaoxin Liang, Sachin S. Sapatnekar
Published 2016-01-01

Performance Characterization and Majority Gate Design for MESO-Based Circuits

by Zhaoxin Liang, Meghna G. Mankalale, Jiaxi Hu, Zhengyang Zhao, Jian-Ping Wang, Sachin S. Sapatnekar
Published 2018-01-01

CoMET: Composite-Input Magnetoelectric- Based Logic Technology

by Meghna G. Mankalale, Zhaoxin Liang, Zhengyang Zhao, Chris H. Kim, Jian-Ping Wang, Sachin S. Sapatnekar
Published 2017-01-01