SC-DDPL as a Countermeasure against Static Power Side-Channel Attacks

by Davide Bellizia, Riccardo Della Sala, Giuseppe Scotti
Published 2021-06-01

A Novel Ultra-Compact FPGA PUF: The DD-PUF

by Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti
Published 2021-09-01

A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier

by Francesco Centurelli, Riccardo Della Sala, Giuseppe Scotti, Alessandro Trifiletti
Published 2021-03-01

A Novel OTA Architecture Exploiting Current Gain Stages to Boost Bandwidth and Slew-Rate

by Francesco Centurelli, Riccardo Della Sala, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti
Published 2021-07-01

A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate

by Francesco Centurelli, Riccardo Della Sala, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti
Published 2021-04-01