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K. Nehru
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K. Nehru
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K. Nehru
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1
Power analysis data set for 4-Bit MOCLA adder
by
K
.
Nehru
Published 2018-02-01
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Article
2
Design of 16 Bit Vedic Multiplier Using Semi - Custom and Full Custom Approach
by
K
.
Nehru
,
T.T.Linju
Published 2017-04-01
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Article
3
PERFORMANCE ANALYSIS OF POWER GATING TECHNIQUES IN 4-BIT SISO SHIFT REGISTER CIRCUITS
by
K
.
NEHRU
,
C. DEEPTHI
,
S. SUSHMA
,
S. SARAVANAN
Published 2017-12-01
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