Analysis of a Lateral Grain Boundary for Reducing Performance Variations in Poly-Si 1T-DRAM

by Songyi Yoo, Wookyung Sun, Hyungsoon Shin
Published 2020-10-01

A Survey on the Modeling of Magnetic Tunnel Junctions for Circuit Simulation

by Hyein Lim, Seungjun Lee, Hyungsoon Shin
Published 2016-01-01

Analysis of Read Margin and Write Power Consumption of a 3-D Vertical RRAM (VRRAM) Crossbar Array

by Sujin Choi, Wookyung Sun, Hyungsoon Shin
Published 2018-01-01

Optimization Considerations for Short Channel Poly-Si 1T-DRAM

by Songyi Yoo, Woo-Kyung Sun, Hyungsoon Shin
Published 2020-06-01

Multibit-Generating Pulsewidth-Based Memristive-PUF Structure and Circuit Implementation

by Seoyeon Choi, Dayoung Kim, Yunyeong Choi, Wookyung Sun, Hyungsoon Shin
Published 2020-09-01

A New Circuit Model for Spin-Torque Oscillator Including Perpendicular Torque of Magnetic Tunnel Junction

by Hyein Lim, Sora Ahn, Miryeon Kim, Seungjun Lee, Hyungsoon Shin
Published 2013-01-01

Analysis of the Sensing Margin of Silicon and Poly-Si 1T-DRAM

by Hyeonjeong Kim, Songyi Yoo, In-Man Kang, Seongjae Cho, Wookyung Sun, Hyungsoon Shin
Published 2020-02-01

Memristor Neural Network Training with Clock Synchronous Neuromorphic System

by Sumin Jo, Wookyung Sun, Bokyung Kim, Sunhee Kim, Junhee Park, Hyungsoon Shin
Published 2019-06-01

Selected Bit-Line Current PUF: Implementation of Hardware Security Primitive Based on a Memristor Crossbar Array

by Dayoung Kim, Tae-Hyeon Kim, Yunyeong Choi, Geun Ho Lee, Jungwon Lee, Wookyung Sun, Byung-Gook Park, Hyungjin Kim, Hyungsoon Shin
Published 2021-01-01