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Huei Chaeng Chin
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Huei Chaeng Chin
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Huei Chaeng Chin
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1
Performance Evaluation of 14 nm FinFET-Based 6T SRAM Cell Functionality for DC and Transient Circuit Analysis
by
Wei Lim
,
Huei
Chaeng
Chin
,
Cheng Siong Lim
,
Michael Loong Peng Tan
Published 2014-01-01
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Article
2
Design and performance analysis of 1-Bit FinFET full adder cells for subthreshold region at 16 nm process technology
by
Abdul Tahrim, Aqilah
,
Huei
,
Chaeng
Chin
,
Cheng, Siong Lim
,
Loong, Michael Peng Tan
Published 2015
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Article
3
Design and Performance Analysis of 1-Bit FinFET Full Adder Cells for Subthreshold Region at 16 nm Process Technology
by
‘Aqilah binti Abdul Tahrim
,
Huei
Chaeng
Chin
,
Cheng Siong Lim
,
Michael Loong Peng Tan
Published 2015-01-01
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Article
4
Enhanced Device and Circuit-Level Performance Benchmarking of Graphene Nanoribbon Field-Effect Transistor against a Nano-MOSFET with Interconnects
by
Huei
Chaeng
Chin
,
Cheng Siong Lim
,
Weng Soon Wong
,
Kumeresan A. Danapalasingam
,
Vijay K. Arora
,
Michael Loong Peng Tan
Published 2014-01-01
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Article
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