Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs

by Antonio Canelas, Fabio Passos, Nuno Lourenco, Ricardo Martins, Elisenda Roca, Rafael Castro-Lopez, Nuno Horta, Francisco V. Fernandez
Published 2021-01-01

Ready-to-Fabricate RF Circuit Synthesis Using a Layout- and Variability-Aware Optimization-Based Methodology

by Fabio Passos, Elisenda Roca, Ricardo Martins, Nuno Lourenco, Saiyd Ahyoune, Javier Sieiro, Rafael Castro-Lopez, Nuno Horta, Francisco V. Fernandez
Published 2020-01-01

Chaotic Image Encryption Using Hopfield and Hindmarsh–Rose Neurons Implemented on FPGA

by Esteban Tlelo-Cuautle, Jonathan Daniel Díaz-Muñoz, Astrid Maritza González-Zapata, Rui Li, Walter Daniel León-Salas, Francisco V. Fernández, Omar Guillén-Fernández, Israel Cruz-Vega
Published 2020-02-01