FREACSIM - A Framework for Creating and Simulating Real-Time Capable Network on Chip Systems and Applications

by Dominik Schönwetter, Ronald Veldema, Dietmar Fey
Published 2016-12-01

RISC-V3: A RISC-V Compatible CPU With a Data Path Based on Redundant Number Systems

by Marc Reichenbach, Johannes Knodtel, Sebastian Rachuj, Dietmar Fey
Published 2021-01-01

Hardware-software co-simulation for medical X-ray control units

by Bruno Kleinert, Gholam Reza Rahimi, Marc Reichenbach, Dietmar Fey
Published 2016-11-01