Robust and Energy-Efficient Ultra-Low-Voltage Circuit Design under Timing Constraints in 65/45 nm CMOS

by David Bol
Published 2011-01-01

Study of Back Biasing Schemes for ULV Logic from the Gate Level to the IP Level

by Guerric de Streel, David Bol
Published 2014-07-01

Learning Without Feedback: Fixed Random Learning Signals Allow for Feedforward Training of Deep Neural Networks

by Charlotte Frenkel, Charlotte Frenkel, Martin Lefebvre, David Bol
Published 2021-02-01

Analysis of Dynamic Differential Swing Limited Logic for Low-Power Secure Applications

by Denis Flandre, Dina Kamel, Mathieu Renauld, David Bol, François-Xavier Standaert
Published 2012-03-01

Could Unsustainable Electronics Support Sustainability?

by Nicolas Moreau, Thibault Pirson, Grégoire Le Brun, Thibault Delhaye, Georgiana Sandu, Antoine Paris, David Bol, Jean-Pierre Raskin
Published 2021-06-01