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吳祥維
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吳祥維
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吳祥維
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1
A Shift-Based Segment of BISR Architecture for Embedded Memory
by
Hsiang-Wei Wu
,
吳
祥
維
Published 2004
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2
Identify extrinsic factors affecting the expression of Slit2 splicing form
by
Siang-Wei Wu
,
吳
祥
維
Published 2014
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3
Petri Net Modeling for Prolonging Operational Lifetime of Ad Hoc Networks
by
Hsiang-Wei Wu
,
吳
祥
維
Published 2016
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