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Showing 161 - 180 results of 262 for search '"VLIW"', query time: 0.32s Refine Results
  1. 161
    Probabilistic Loop Scheduling Method for Nested Loop with Conditional Branch on DSP Architecture
    by Jia-Chun Lee, 李嘉淳
    Published 2005
    “... executed on VLIW DSP architecture. The instruction scheduling is an important step through the while...”
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  2. 162
    Register allocation issues on highly distributed register file architectures
    by Lu, Chia-Han, 呂佳翰
    Published 2014
    “... instruction word (VLIW) data-path architectures are increasingly being deployed on embedded devices...”
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  3. 163
    An LLVM Back-end for REPLICA : Code Generation for a Multi-core VLIWProcessor with Chaining
    by Åkesson, Daniel
    Published 2012
    “...REPLICA is a PRAM-NUMA hybrid architecture, with support for instructionlevel parallelism as a VLIW...”
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  4. 164
    Architecture Explorations for Multi-Core Computer Systems
    by Geng-Siao Lee, 李耕學
    Published 2013
    “... the performance of a single processor, this dissertation proposes a novel very long instruction word (VLIW...”
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  5. 165
    Procedures classification for optimizing strategy assignment
    by O. A. Chetverina
    Published 2018-10-01
    “.... Among them VLIW architecture processors are the most compiler-dependent, since their performance...”
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    Article
  6. 166
    TIME-PREDICTABLE FAST MEMORIES: CACHES VS. SCRATCHPAD MEMORIES
    by Liu, Yu
    Published 2011
    “... designs several time-predictable scratchpad memory (SPM) based architectures for both VLIW (Very Long...”
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  7. 167
    Using ILP for Instruction Scheduling and Register Allocation in
    by Chang, Chia Ming, 張家銘
    Published 1994
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  8. 168
    Design of programmable multi-standard baseband processors
    by Nilsson, Anders
    Published 2007
    “... due to their limited computing capacity. Instead VLIW- and SIMD-based processors are used to provide...”
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    Doctoral Thesis
  9. 169
    DeAr: An Efficient and Flexible Digital Signal Processor Design for Heterogeneous System Architecture
    by Chi-Ming Lee, 李齊明
    Published 2016
    “...), but the popular DSP architectures, very-long-instruction-word (VLIW) and application-specific instruction set...”
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  10. 170
    Programmation linéaire en nombres entiers pour l'ordonnancement cyclique sous contraintes de ressources
    by Ayala Perez, Maria
    Published 2011
    “... ressource à prendre en compte pour l'ordonnancement d'instructions dans les processeurs de type VLIW (Very...”
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  11. 171
    An Embedded Digital Signal Processor Design with Hierarchical Register File & Packed Instructions
    by Chen-Chia Lee, 李承家
    Published 2004
    “... reduce the hardware complexity. Moreover, we have adopted the Very Long Instruction Word (VLIW...”
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  12. 172
    Software Implementation of MPEG-4 Video Decoder on PACDSP Platform
    by Chung-Yen Tsai, 蔡崇諺
    Published 2006
    “... VLIW digital signal processor (DSP) and an ARM920T processor. We complete many anlyses to optimize...”
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  13. 173
    Integrated Register Allocation and Instruction Scheduling with Constraint Programming
    by Castañeda Lozano, Roberto
    Published 2014
    “... as instruction scheduling for Very Long Instruction Word (VLIW) processors. The model is based on three novel...”
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  14. 174
    Reconfigurable heterogeneous DSP/FPGA based embedded architectures for numerically intensive computing workloads
    by Brogioli, Michael C.
    Published 2009
    “..., and presents a retargetable compiler infrastructure for multi-clustered VLIW style digital signal processor...”
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  15. 175
    Power estimation on functional level for programmable processors
    by M. Schneider, H. Blume, T. G. Noll
    Published 2004-01-01
    “... beispielsweise Very Long Instruction Word (VLIW)-Architekturen bewertet. Besonderes Augenmerk liegt hierbei auf...”
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    Article
  16. 176
    Architectural exploration of digital systems design for FPGAs using C/C++/SystemC specification languages
    by Silva, Jeferson Santiago da
    Published 2015
    “... Exploration) provaram ser mais eficazes que o fluxo HLS não guiado, em ao menos 50% para um processador VLIW e...”
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  17. 177
    Architectural exploration of digital systems design for FPGAs using C/C++/SystemC specification languages
    by Silva, Jeferson Santiago da
    Published 2015
    “... Exploration) provaram ser mais eficazes que o fluxo HLS não guiado, em ao menos 50% para um processador VLIW e...”
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    Others
  18. 178
    Architectural exploration of digital systems design for FPGAs using C/C++/SystemC specification languages
    by Silva, Jeferson Santiago da
    Published 2015
    “... Exploration) provaram ser mais eficazes que o fluxo HLS não guiado, em ao menos 50% para um processador VLIW e...”
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    Others
  19. 179
    Reducing exception management overhead with software restart markers
    by Hampton, Mark Jerome, 1977-
    Published 2008
    “... machines with large quantities of programmer-visible state, such as VLIW or vector processors...”
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  20. 180
    DESIGN AND IMPLEMENTATION OF A CPU WITHOUT INSTRUCTION DECODERS
    by Chung-hsiang Wang, 王忠祥
    Published 2019
    “... the no-deocder CPU to superscalar CPU, VLIW CPU and multi-processor system. ...”
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