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  1. 41
    Code compaction and parallelization for VLIW/DSP chip architectures
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  2. 42
    Design of Deep Learning VLIW Processor for Image Recognition
    Published 2020-02-01
    Subjects: “...very long instruction word(vliw)...”
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  3. 43
    An Efficient and Fast VLIW Compression Scheme for Stream Processor
    by Gongli Li, Yingying Hou, Junzhe Zhu
    Published 2020-01-01
    “... structure of VLIW (very long instruction word, VLIW) and multiple parallelizable instructions are organized...”
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  4. 44
    Selective Code Duplication for Soft Error Protection on VLIW Architectures
    by Yohan Ko, Soohwan Kim, Hyunchoong Kim, Kyoungwoo Lee
    Published 2021-07-01
    Subjects: “...VLIW...”
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  5. 45
    Building partitioned dictionary with benefit estimation for VLIW code compression
    by 楊佳原
    Published 2004
    “...碩士 === 國立交通大學 === 資訊工程系所 === 92 === It is a trend that people adopt VLIW to enhance processor...”
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  6. 46
    Branch Prediction with Pre-Calculating Schemes for Superscalar/VLIW Processors
    by Hu, Chang-Sung, 胡長松
    Published 1997
    “... the performance of popelining. It is even more important in superscalar/VLIW machines. In this thesis, we present...”
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  7. 47
    A study on compilation environment for a homogeneous VLIW computer
    by YUE, PENG-XIANG, 岳鵬翔
    Published 1993
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  8. 48
    Design and Verification for Dual Issue VLIW Digital Signal Processor
    by Chih-Chiang Chen, 陳志強
    Published 2008
    “... architectures are proposed and can be classified into two main approaches, the superscaler and the VLIW...”
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  9. 49
    Datapath Design for Asynchronous Two-way VLIW Multicore Processor
    by Liao, Chih-Wei, 廖志偉
    Published 2011
    “... serious problems in complex systems. In this study, we designed an asynchronous two-way VLIW multicore...”
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  10. 50
    Loop Optimization and Performance Evaluation for a Homogeneous VLIW Computer
    by Huang, Chung Ren, 黃崇仁
    Published 1994
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  11. 51
    Interrupt Control and Functional Simulation for a Homogeneous VLIW Processor
    by Wu, Son Suan, 吳上玄
    Published 1994
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  12. 52
    Integrate System Library Flow for PAC VLIW DSP Processors
    by Chao-Jia Chang, 張肇嘉
    Published 2007
    “..., low power, and low cost VLIW DSP processor applied to the embedded systems. On the embedded system...”
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  13. 53
    Efficient Datapath Design for Clustered & Pipelined VLIW DSP Processors
    by Pi-Chen Hsiao, 蕭丕承
    Published 2005
    “... communication mechanism with distributed & ping-pong register file organization in a complete 4-way VLIW DSP...”
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  14. 54
    A Modulo Scheduling Based C Compiler for VLIW Processors
    by Sien-Keat Ang, 洪新傑
    Published 2003
    “...碩士 === 國立中正大學 === 資訊工程研究所 === 91 === VLIW (Very Long Instruction Word) processors need...”
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  15. 55
    Instruction Compression Design for Asynchronous two-way VLIW Processor
    by Chang, Jui-Hung, 張瑞宏
    Published 2010
    “...碩士 === 國立交通大學 === 資訊科學與工程研究所 === 99 === The concept of VLIW is multiple instruction issue...”
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  16. 56
    Data Path Design for Asynchronous two-way VLIW Processor
    by Li, Guo-Cheng, 李國成
    Published 2010
    “... number of image data. They improve performance with VLIW and SIMD in some instances. However...”
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  17. 57
    A clustered VLIW architecture based on queue register files
    by Fernandes, Marcio Merino
    Published 1998
    “... involved might limit the scalability of this model. VLIW architectures use a different approach to exploit...”
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  18. 58
    Improving ILP with the Vectorized Computing Mechanism in VLIW DSP Architecture
    by Te-Shin Yang, 楊得鑫
    Published 2003
    “... application, current digital signal processors use VLIW architectures to increase the degree of instruction...”
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  19. 59
    A Digital Signal Processor Using VLIW and SIMD Technologies
    by Hwu, Jaw-Yow, 胡肇祐
    Published 1998
    “... signal processor (DSP) by using very-long-instruction-word (VLIW) and single-instruction...”
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  20. 60
    Design and evaluation of a VLIW processor for real-time systems
    by Starke, Renan Augusto
    Published 2016
    “... tese, investiga-se uma arquitetura de processador Very-Long Instruction Word (VLIW) especificamente...”
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