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  1. 221
    Dynamic Binary Translation on a Dual-Threaded Machine
    by Wu-Hsien Chuang, 莊武憲
    Published 2003
    “... and IBM DAISY provide the successful examples of binary translation in their own VLIW processors. One...”
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  2. 222
    Architecture Analysis and Design of Programmable Communication Processor
    by Ching-Kai Liang, 梁景凱
    Published 2009
    “... up to 100s and even 1000s of GOPS, current DSP processors with VLIW architecture will not be able...”
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  3. 223
    A comparison of fault simulation experiments and fault tolerant capability analysis under different developing environments
    by Shang-Yu Tao, 陶尚宇
    Published 2006
    “... of this thesis is to test the capability of error tolerant of Very Long Instruction Word (VLIW) processors in two...”
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  4. 224
    Is it viable to use multithread on a single CPU
    by chung-yun hung, 洪仲昀
    Published 2005
    “... or VLIW architectures, which contains multiple units on a single processor. Simultaneous Multithreading...”
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  5. 225
    Noise reduction for video signals
    by Li, Xiaoli
    Published 2009
    “...-time software module on a VLIW DSP chip. Both prototypes made the intensive subjective evaluations...”
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  6. 226
    Design of Single Scalar DSP based H.264/AVC Decoder
    by Tiejun Hu, Di Wu
    Published 2005
    “... in the market. Compare to media processor, which is generally SIMD or VLIW, single scalar DSP is cheaper and has...”
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  7. 227
    Integrated Software Pipelining
    by Eriksson, Mattias
    Published 2009
    “...In this thesis we address the problem of integrated software pipelining for clustered VLIW...”
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  8. 228
    Register Allocation for Embedded Processors
    by Cheng-Yu Lee, 李承諭
    Published 2014
    “.... The processor, called UniDual, is a two-way VLIW (very long instruction word) unified RISC (reduced instruction...”
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  9. 229
    A resource constrained loop pipelining technique for perfectly-nested loop structures.
    by Aakre, Thor Davis
    Published 2014
    “... on VLIW machines. Previously implemented loop pipelining techniques provide limited performance because...”
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  10. 230
    Design and implementation of a high-speed data logging facility for a dual DSP system
    by Yedid Barba, Erika
    Published 2009
    “... method for dealing with the microarchitecture of the Tl TMS320C67 processor, which integrates VLIW...”
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  11. 231
    Design and Implementation of Customized Function Unit For MPEG Audio Layer-3 Decoder
    by Jen-Chieh Lin, 林仁傑
    Published 2005
    “... system. In this thesis, we proposed a VLIW SMT architecture that have three function units, which have...”
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  12. 232
    Research and Design of the EIH(Exception and Interrupt Handler) of the Control unit of the NSC98 Advanced Micro-Processor
    by Hung, Chiz-Hung, 洪誌鴻
    Published 1998
    “... processor in a flexileVLIW architecture；and it can convert each X86 CISC...”
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  13. 233
    A Study on MPEG-4 HE-AAC and Its Implementation Issues on Trimedia DSPs
    by Chi-Hao Wu, 巫奇豪
    Published 2006
    “... the inherent parallelism characteristics of Trimedia DSPs. With Trimedia Very Long Instruction Word (VLIW...”
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  14. 234
    The Design and Implementation of a Vision-BasedIntelligent Automatic Guided Vehicle System
    by Chia-Jen Yu, 余佳任
    Published 2004
    “... by the shadow. 2.Base on a CCD image collection module and TMS320C6416 high-order VLIW digital signal...”
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  15. 235
    Design and Implementation of DSP Datapath for Baseband Processing
    by Yu-Ming Chang, 張育銘
    Published 2003
    “..., just as the VLIW principles. Moreover, we have developed a complete software tool to automatically...”
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  16. 236
    Experimental Assessment of Fault Coverage for Fault-Tolerant High-Performance Processors
    by Shih Meng Ju, 石孟儒
    Published 2007
    “... the failed component. Since then, the system performs at degraded mode. An experimental VLIW architecture...”
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  17. 237
    Fine grain mapping strategies for pipelined computer systems
    by Shieh, Jong-Jiann
    Published 1990
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  18. 238
    Architectural Enhancements for Color Image and Video Processing on Embedded Systems
    by Kim, Jongmyon
    Published 2005
    “...: dynamically scheduled (superscalar), statically scheduled (very long instruction word, VLIW), and embedded...”
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  19. 239
    Compilation optimisante pour processeurs extensibles
    by Floc'h, Antoine
    Published 2012
    “... ordonnancer les instructions spécialisées VLIW en résolvant un unique problème d'optimisation de programmation...”
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  20. 240
    Explicit data graph compilation
    by Smith, Aaron Lee, 1977-
    Published 2010
    “... improvements, present conventional instruction set architectures such as RISC, CISC, and VLIW with difficult...”
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