Towards Trust Hardware Deployment of Edge Computing: Mitigation of Hardware Trojans based on Evolvable Hardware

Hardware Trojans (HTs) are malicious hardware components designed to leak confidential information or cause the chip/circuit on which they are integrated to malfunction during operation. When we deploy such hardware platforms for edge computing, FPGA-based implementations of Coarse-Grained Reconfigu...

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Bibliographic Details
Main Authors: Huang, Z. (Author), Li, Z. (Author), Luo, N. (Author), Wang, J. (Author), Wang, Q. (Author)
Format: Article
Language:English
Published: MDPI 2022
Subjects:
Online Access:View Fulltext in Publisher
LEADER 02196nam a2200241Ia 4500
001 10.3390-app12136601
008 220718s2022 CNT 000 0 und d
020 |a 20763417 (ISSN) 
245 1 0 |a Towards Trust Hardware Deployment of Edge Computing: Mitigation of Hardware Trojans based on Evolvable Hardware 
260 0 |b MDPI  |c 2022 
856 |z View Fulltext in Publisher  |u https://doi.org/10.3390/app12136601 
520 3 |a Hardware Trojans (HTs) are malicious hardware components designed to leak confidential information or cause the chip/circuit on which they are integrated to malfunction during operation. When we deploy such hardware platforms for edge computing, FPGA-based implementations of Coarse-Grained Reconfigurable Array (CGRA) are also currently falling victim to HT insertion. However, for CGRA, an evolvable hardware (EHW) platform, which has the ability to dynamically change its configuration and behavioral characteristics based on inputs from the environment, provides us with a new way to mitigate HT attacks. In this regard, we investigate the feasibility of using EHW to mitigate HTs that disrupt normal functionality in CGRA in this paper. When it is determined that HT is inserted into certain processing elements (PEs), the array autonomously reconfigures the circuit structure based on an evolutionary algorithm (EA) to avoid the use of HT-infected (HT-I) PEs. We show that the proposed approach is applicable to: (1) hardware platforms that support coarse-grained reconfiguration; and (2) pure combinatorial circuits. In a simulation environment built in Python, this paper reports experimental results for two target evolutionary circuits and outlines the effectiveness of the proposed method. © 2022 by the authors. Licensee MDPI, Basel, Switzerland. 
650 0 4 |a coarse-grained reconfigurable array (CGRA) 
650 0 4 |a evolvable hardware (EHW) at edge 
650 0 4 |a field-programmable gate array (FPGA) 
650 0 4 |a hardware security 
650 0 4 |a hardware trojan (HT) 
700 1 |a Huang, Z.  |e author 
700 1 |a Li, Z.  |e author 
700 1 |a Luo, N.  |e author 
700 1 |a Wang, J.  |e author 
700 1 |a Wang, Q.  |e author 
773 |t Applied Sciences (Switzerland)