A modified voltage balancing sorting algorithm for the modular multilevel converter: Evaluation for staircase and phase-disposition PWM

This paper introduces a low complexity implementation of the voltage balancing sorting algorithm to reduce the switching frequency of the power devices in modular multilevel converters (MMCs). Two modulation techniques are evaluated; staircase modulation and phase-disposition pulse-width modulation...

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Bibliographic Details
Main Authors: Agelidis, V.G (Author), Ceballos, S. (Author), Darus, R. (Author), Konstantinou, G. (Author), Pou, J. (Author)
Format: Article
Language:English
Published: Institute of Electrical and Electronics Engineers Inc. 2014
Subjects:
Online Access:View Fulltext in Publisher
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020 |a 9781479923250 (ISBN) 
245 1 0 |a A modified voltage balancing sorting algorithm for the modular multilevel converter: Evaluation for staircase and phase-disposition PWM 
260 0 |b Institute of Electrical and Electronics Engineers Inc.  |c 2014 
856 |z View Fulltext in Publisher  |u https://doi.org/10.1109/APEC.2014.6803318 
856 |z View in Scopus  |u https://www.scopus.com/inward/record.uri?eid=2-s2.0-84900419732&doi=10.1109%2fAPEC.2014.6803318&partnerID=40&md5=34c30ccae4d3b919bd4b6a0f639df8d6 
520 3 |a This paper introduces a low complexity implementation of the voltage balancing sorting algorithm to reduce the switching frequency of the power devices in modular multilevel converters (MMCs). Two modulation techniques are evaluated; staircase modulation and phase-disposition pulse-width modulation (PD-PWM) under the conventional and the proposed algorithm. Using a circulating current controller in an MMC with 12 sub-modules per arm, PD-PWM yields better results compared to the staircase modulation technique. The test condition for this comparison is such that the power devices operate at a similar switching frequency and produce similar amplitudes to the capacitor voltage ripples in both modulation techniques. The results are verified through extensive simulations and experimentally using a phase-leg MMC laboratory prototype. © 2014 IEEE. 
650 0 4 |a Algorithms 
650 0 4 |a Capacitor voltage balancing 
650 0 4 |a Capacitor voltage ripple 
650 0 4 |a Capacitors 
650 0 4 |a Circulating current 
650 0 4 |a Electric converters 
650 0 4 |a Extensive simulations 
650 0 4 |a Frequency modulation 
650 0 4 |a Modular multilevel converter 
650 0 4 |a Modular multilevel converters 
650 0 4 |a Modulation technique 
650 0 4 |a Modulation techniques 
650 0 4 |a Power electronics 
650 0 4 |a Pulse modulation 
650 0 4 |a Pulse width modulation 
650 0 4 |a Pulse-width modulation 
650 0 4 |a Sorting algorithm 
650 0 4 |a Stairs 
650 0 4 |a Switching frequency 
650 0 4 |a Voltage balancing 
650 0 4 |a Voltage control 
700 1 0 |a Agelidis, V.G.  |e author 
700 1 0 |a Ceballos, S.  |e author 
700 1 0 |a Darus, R.  |e author 
700 1 0 |a Konstantinou, G.  |e author 
700 1 0 |a Pou, J.  |e author