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| LEADER |
01404nam a2200205Ia 4500 |
| 001 |
0.3390-electronics11081177 |
| 008 |
220421s2022 CNT 000 0 und d |
| 020 |
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|a 20799292 (ISSN)
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| 245 |
1 |
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|a Increasing EMI Immunity and Linearity of a CMOS 180 nm Voltage-to-Delay Converter
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| 260 |
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|b MDPI
|c 2022
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| 856 |
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|z View Fulltext in Publisher
|u https://doi.org/10.3390/electronics11081177
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|a This paper presents a voltage-controlled delay unit (VCDU) with a novel architecture allowing for a wide input range of linearity and an improved immunity to electromagnetic interferences. The circuit is based on a current-starved inverter with a biasing technique to extend the input voltage range of linearity near to the rail-to-rail linearity range. The proposed scheme was designed by UMC 180 nm standard CMOS process and works without power-hungry amplifiers or comparators. It has a voltage supply of 1.8 V and exhibits a rail-to-rail linearity range (0–1.8 V) with an average EMI-induced jitter of only 1% of the nominal delay. © 2022 by the authors. Licensee MDPI, Basel, Switzerland.
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| 650 |
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|a digitally based analog circuits
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| 650 |
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|a electromagnetic immunity
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| 650 |
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|a time-mode signal processing
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| 650 |
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|a voltage-to-time converter
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| 700 |
1 |
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|a Bosio, F.A.
|e author
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|a Colalongo, L.
|e author
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|a Richelli, A.
|e author
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| 773 |
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|t Electronics (Switzerland)
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