Architectural enhancement for message passing interconnects

Architectural enhancement for message passing interconnects

Research in high-performance architecture has been focusing on achieving more computing power to solve computationally-intensive problems. Advancements in the processor industry are not applicable in applications that need several hundred or thousand-fold improvement in performance. The parallel ar...

Full description

Bibliographic Details
Main Author: Khun Jush, Farshad
Other Authors: Dimopoulos, Nikitas
Language:English
en
Published: 2008
Subjects:
Network Cache
MPI
Memory Hierarchy System
DTCT Techniques
UVic Subject Index::Sciences and Engineering::Engineering::Electrical engineering
UVic Subject Index::Sciences and Engineering::Applied Sciences::Computer science
Online Access:http://hdl.handle.net/1828/1225

Internet

http://hdl.handle.net/1828/1225

Similar Items