A wavelet-based framework for efficient processing of digital imagery with an application to helmet-mounted vision systems
Image acquisition devices, as well as image processing theory, algorithms, and hardware have advanced to the point that low Size-Weight-and-Power, real-time embedded imaging systems have become a reality. To be practical in a fielded application, an image processing sub-system must be able to conduc...
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| Format: | Others |
| Language: | English |
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University of Iowa
2017
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| Online Access: | https://ir.uiowa.edu/etd/6435 https://ir.uiowa.edu/cgi/viewcontent.cgi?article=7935&context=etd |
| Summary: | Image acquisition devices, as well as image processing theory, algorithms, and hardware have advanced to the point that low Size-Weight-and-Power, real-time embedded imaging systems have become a reality. To be practical in a fielded application, an image processing sub-system must be able to conduct multiple, often highly complex tasks, in real-time. The design and construction of such systems have to address technical challenges, including real-time, low-latency processing and fixed-point algorithms in order to leverage lowest-power computing platforms. Further design complications stem from the reality that state-of-the-art image processing algorithms take very different forms, greatly complicating low-latency implementations. This dissertation presents the design and preliminary implementation of an image processing sub-system that minimizes computational complexity and power consumption by eliminating repeated transformations between processing domains. Specifically, this processing chain utilizes the LeGall 5/3 wavelet as the basis for applying multiple algorithms within a single domain. The wavelet processing chain is compared, in terms of image quality, computational cost, and power consumption, to a benchmark processing chain comprised of algorithms intended to produce high quality image results. Image quality is assessed through a subject matter expert evaluation. Computational cost is analyzed theoretically and empirically, and the power consumption is derived from the execution times and characteristics of the processing devices. The results demonstrate significant promise, but several areas for additional work have been identified. |
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