VLSI circuit defect diagnosis: open defects and run-time speed
To shorten time-to-market of VLSI circuit chips, the yield must be ramped up by quickly discovering and rectifying the causes for systematic defects. Due to the shrinking feature size of devices 90nm and below, yield ramp up is becoming more and more difficult. Volume diagnosis with...
Main Author: | Liu, Chen |
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Other Authors: | Reddy, Sudhakar M. |
Format: | Others |
Language: | English |
Published: |
University of Iowa
2008
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Subjects: | |
Online Access: | https://ir.uiowa.edu/etd/8 https://ir.uiowa.edu/cgi/viewcontent.cgi?article=1193&context=etd |
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