Fault tolerant microcontroller for the configurable Fault Tolerant Processor

Fault tolerant microcontroller for the configurable Fault Tolerant Processor

In this thesis, the design of a fault tolerant microcontroller for the Configurable Fault Tolerant Processor is presented. The Configurable Fault Tolerant processor is a spaceborne Field Programmable Gate Array experiment platform susceptible to Single Event Upsets. Fault tolerance is needed to cont...

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Bibliographic Details
Main Author:	Dwiggins, David E.
Other Authors:	Loomis, Herschel H.
Published:	Monterey, California. Naval Postgraduate School 2012
Online Access:	http://hdl.handle.net/10945/3989

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